A target machine is a byte-addressable machine. This machine has n general-purpose registers, R0, R1,…..Rn-1. A Simple Target Machine Model has three-address instruction. A full-edged assembly language would have a variety of instructions. The component of instruction is an operator, followed by a target, and then followed by a list of source operands.
Some of the instructions are as follows:
- Load operations: LD dst, addr instruction loads the value in location addr into location dst. It means that assignments dst = addr. L, r, x is the general form of this instruction. The role of this instruction is to load the value in location x into register r.
- Store operations: ST r, x instruction stores the value in the location x into register r.
- Computation operations: OP, dst, src1, src2 are the form of computation operations where OP are the add or sub operator and dst, src1, and src2 are locations. The locations may or may not be distinct.
- Unconditional Operations: The instruction BR L causes control to branch to the machine instruction with label L (BR stands for the branch).
- Conditional jumps: The general form of this operation is Bcond, r, L. Here R is the register, L is a label, and cond stands for any of the common tests on the value in register r.
The various addressing modes associated with the target machine are discussed below:
- In instruction, a variable name x means there is a location in memory reserved for x.
- An indexed address in the form a(r), where ‘a’ is a variable and r is a register, can also be a form of a location. By taking the l-value of ‘a’ and adding it with the value in the register, the value of memory location denoted by a(r) can be computed.
- An integer indexed by a register can be a memory location. For example, LD R1, 100(R2) has the effect of setting R1 = contents (100 + contents (R2)).
- There are two indirect addressing modes: *r and *100(r). *r has the address of contents(r), and *100(r) has the address for adding 100 to the contents(r).
- The immediate constant addressing mode is the last addressing mode, which is denoted by prefix #.
Program and Instruction Costs
The cost refers to compiling and running a program. There are some aspects of the program on which we optimize the program. The program’s cost can be determined by the compilation time’s length and the size, execution time, and power consumption of the target program. Finding the actual cost of the program is a tough task. Therefore, code generation use heuristic techniques to produce a good target program. Each target-machine instruction has an associated cost. The instruction cost is one plus the cost associated with the addressing modes of the operands.
LD R0, R1: This instruction copies the contents of register R1 into register R0. The cost of this instruction is one because no additional memory is required.
LD R0, M: This instruction’s role is to load the contents of memory location M into R0. So the cost will be two due to the address of memory location M is found in the word following the instruction.
LD R1, *100(R2): The role of this instruction is to load the value given by contents (contents (100 + contents (R2))) into register R1. This instruction’s cost will be two due to the constant 100 is stored in the word following the instruction.