8085 instructions set

Introduction:

In the computer, the user sends the data. The computer can use data and it also process the data. After the processing, send the result to the user. The specific instruction does it. Without instruction, we cannot put the data or receive the data from the computer.

So, microprocessor 8085 also has some instruction set for writing a program. Using the instructions, we can put the data and also receive the data from the microprocessor 8085.

This instruction set is also divided into some groups. Now, we are briefly discussing the instruction set of 8085.

1) Data Transfer group:

  • MOV - We can move 8-bit data from one register to another by this instruction.
    Example:

    MOV A, B

    The above instruction means moving data B register to the A register or Accumulator.

    MOV L, H

    The above instruction means data of the H register move to the L register.

    MOV A, M

    The above instruction means move data memory location to Accumulator.
  • MVI - We can move immediate data to the register by this instruction.

    Example:

    MVI A, 0A

    The above instruction means 0A is an 8-bit immediate data that will be copied to the Accumulator.  [A] ← 0A

    MVI H, 00

    The above instruction means 00 is an 8-bit immediate data that will be copied to the H register. [H] ← 00

    MVI L, C0

    The above instruction means C0 is an 8-bit immediate data that will be copied to the L register. [L] ← C0
  • LXI - By this instruction, we can load the register pair immediate.
    Example: LXI H, C000

    The above instruction means the content of the C000 address load immediate to the HL pair register.  [H-L] ← C000

    LXI B, D000

    The above instruction means the content of the D000 address load immediate to the BC pair register.  [B-C] ← D000
  • LDA - By this instruction, we can load Accumulator directly.

    Example: LDA 2000

    The above instruction means the data of the 2000 locations will be loaded in the Accumulator directly.

    If the data of the 2000 location is 05, then 05 loads into the Accumulator. [A] ← 05
  • STA - By this instruction, we can store the content of the Accumulator in the memory location which is mentioned.

    Example: STA C500

    The above instruction means the content of the Accumulator will be stored in the memory location C500.
  • LHLD - By this instruction, we can load the H-L pair direct. We can load the content in the memory location.

    Example: LHLD C000

    The above instruction means register L will load C000 and H will load C001. If the content of C000 is C2 and C001 is 06, then.

    [L] ← [C000] ← C2
    [H] ← [C001] ← 06

What is the difference between LHLD and LXI instruction?

LHLDLXI
In LHLD instruction, we are not bothered about data. The content of the memory location load to the L and next to H.LXI means Load 16-bit data in the H-L pair.
  • SHLD - By this instruction, we can move the data of the H-L register pair to the two consecutive memory locations.

    Example: SHLD 2000

    The above instruction means that the data of register L will be loaded in the 2000 memory location, and the data of register H will be loaded in the 2001 memory location, then.

    [2000] ← [L]
    [2001] ← [H]

What is the difference between LHLD and SHLD instruction?

LHLDSHLD
In LHLD instruction, we are not bothered about data. The content of the memory location load to the L and next to H.In SHLD instruction, the content of register L will load the first memory location, and the content of register H will be loaded into the next memory location.
  • LDAX rp - rp means register pair. By this instruction, we can store the content of the register pair to the Accumulator. This register pair is only valid for B-C and D-E but is not used in the H-L register pair.

    Example: LDAX B

    The above instruction means the content of the content of register pair D-E to the Accumulator. [A] ← [[B-C]] (double bracket means content of the content, single bracket means content)
  • STAX rp - rp means register pair. By this instruction, we can store the content of the Accumulator to an address which is available in the register pair.

    Example: STAX B

    The above instruction means the content of the Accumulator will be loaded in the content of the content of the B-C register pair. [[B-C]] ← [A]
  • With the help of XCHG instruction, we can exchange the content of the H-L pair with the D-E pair. It is a 16-bit exchange. It is done only H-L pair and D-E pair, not the use of the B-C pair. [H-L] ←[D-E]
  • [r= A or B or C or H]

2. Exchange Instruction:

  • XCHG - With the help of XCHG instruction, we can exchange the content of the H-L pair with the D-E pair. It is a 16-bit exchange. It is done only H-L pair and D-E pair, not the use of the B-C pair. [H-L] ←[D-E]

3. Arithmetic Rule:

  • ADD r - [r= A or B or C or H]
    It means adding the content of the Accumulator to the content of the register and storing content in the Accumulator.

    Example: ADD B
    It means adding the Accumulator's content to the B register's content and storing it into the Accumulator.  [A] ← [A] + [B]

    ADD M

    It means adding the content of memory with the content of the Accumulator and storing it in the Accumulator.  [A] ← [[H-L]] + [A]
  • ADC r - By this instruction, we can add with carrying.
    Example: ADC D

    It means adding the Accumulator's content to the D register's content with the Carry and storing it in the Accumulator.  [A] ← [A] + [D] + [CY]

    ADC M
    It means the content of content of the H-L pair will be added to the content of the Accumulator with the Carry and stored result in the Accumulator.

     [A] ← [[H-L]] + [A] + [CY]
  • ADI - It means adding the data immediately.
    Example: ADI 06
    It means the Accumulator's content will be added with the 8-bit immediate data 06 and the Carry also added. Then the result will store in the Accumulator.

    |[A] ← [A] + 06 + [CY]
  • DAD - It means 16-bit addition.
    Example: DAD B

    It means the content of H-L pair add with the content of B-C  pair and result will store into the H-L pair.  [H-L] ← [H-L] + [B-C]

    DAD E

    It means the content of the H-L pair will be added to the content of the D-E pair, and the result will be stored in the H-L pair.  [H-L] ← [H-L] + [D-E]

4. Subtraction Instruction:

  • SUB r - It means subtracting the register's content from the Accumulator's content and storing it in the Accumulator.
    Example: SUB C

    It means subtracting the C register's content from the Accumulator's content and storing it in the Accumulator. [A] ← [A] - [C]

    SUB M

    It means subtracting the content of memory from the content of the Accumulator and storing the content in the Accumulator. [A] ← [A] - [[H-L]]
  • SBB - It means subtracting with borrow.
    Example: SBB M

    It means to subtract the memory content, borrow from the Accumulator's content, and store it in the Accumulator. [A] ← [A] - [[H-L]] - [CY]
  • SUI - It means subtracting immediate data.

    Example: SUI 05
    It means subtracting the immediate data 05 to the content of the Accumulator, and then the result will be stored in the Accumulator. [A] ← [A] - 05
  • SBI - It means subtracting immediate data with carrying.

    Example: SBI 0A
    It means subtracting the immediate data 0A and the Carry to the content of the Accumulator, and the result will store in the Accumulator. [A] ← [A] - 0A - [CY]
  • INR r - This instruction means incrementing the register's content by 1, and the result will be stored in the register.   

    Example: INR A

    It means to increment the content of register A by 1, and the result will store in the register A. [A] ← [A] + 1
  • DCR r - This instruction means to decrement the content of the register by 1, and the result will be stored in the register.
    Example: DCR A

    It means decrements the content of register A by 1, and the result will store in register A. [A] ← [A] - 1
  • INX rp - This instruction means to increment the content of the register pair by 1, and the result will store in the register pair.

    Example: INX H
    INX H It means to increment the content of the H-L register pair by one, and the result will store in the register pair. [H-L] ← [H-L] + 1
  • DCX rp - This instruction means to decrement the content of the register pair by 1, and the result will store in the register pair.

    Example: DCX H
    It means decrements the content of the H-L register pair by one, and the result will store in the register pair. [H-L] ← [H-L] - 1
  • DAA - This instruction DAA means Decimal Adjust Accumulator. We can only be used this instruction after the add instruction, not in the subtraction instruction.

5. Logical Group:

  • ANA r - This instruction means AND the content of the register and the content of the Accumulator.

    [A] ← [A] ^ [r]

AND operation means logical AND. The truth table of logical AND is given below:

ABO/P
000
010
100
111

Example:

ANA A

The above instruction means AND the content of the Accumulator with itself. Then the result will store in the Accumulator.  [A] ← [A] ^ [A]

ANA M

The above instruction means AND the content of the Accumulator with the content of content of the H-L pair. Then the result will store in the Accumulator.

[A] ← [A] ^ [[H-L]]

  • ANI 0F - This instruction means AND the content of the Accumulator with the immediate value 0F. Then the result will store in the Accumulator.

    [A] ← [A] ^ [0F]

    Example:ANI 05

    The above instruction means AND the content of the Accumulator with the immediate value 05. Then the result will store in the Accumulator. [A] ← [A] ^ [05]
  • ORA r -  This instruction means OR the content of the register and the content of the Accumulator. Then the result will store in the Accumulator.

[A] ← [A] ? [r]

OR operation means logical OR. The truth table of logical OR is given below:

ABO/P
000
011
101
111

Example:

ORA A

The above instruction means, OR the content of the Accumulator with itself. Then the result will store in the Accumulator. [A] ← [A] ? [A]

ORA M

The above instruction means, OR the Accumulator's content with the memory's content. Then the result will store in the Accumulator. [A] ← [A] ? [[H-L]]

  • ORI OB - This instruction means OR the content of the Accumulator with the immediate value 0B. Then the result will store in the Accumulator

    [A] ← [A] ? [0B]

  Example:

The above instruction means OR the content of the Accumulator with the immediate value 05. Then the result will store in the Accumulator.

[A] ← [A] ? [05]

  • XRA r - This instruction means XOR the register's content and the Accumulator's content. Then the result will store in the Accumulator.

[A] ← [A] XOR [r]

XOR operation means logical XOR. The truth table of logical XOR is given below:

ABO/P
000
011
101
110

Example:

XRA A

The above instruction means XOR the content of the Accumulator with itself and stored it in accumulator.  [A] ← [A] XOR [A]

XRA M

The above instruction means XOR the Accumulator's content with the memory's content and stored it in accumulator. [A] ← [A] XOR [[H-L]]

  • XRI OB - This instruction means XOR is the content of the Accumulator with the immediate value 0B. Then the result will store in the Accumulator.

[A] ← [A] XOR [0B]

Example:

XRI 05

The above instruction means XOR is the content of the Accumulator with the immediate value 05. [A] ← [A] XOR [05]

  • CMA - The CMA instruction means to complement the content of the Accumulator. If the accumulator content is FF, its binary value is 11111111. Then after execution of the CMA instruction, accumulator content is 00, and its binary value is 00000000.
  • CMC - The CMC instruction means to complement the carry status. If the carry status is 1, then after execution of CMC instruction, the carry status is 0 and vice versa.

6. Jump Instruction:

  1. JMP - This instruction means to jump. It is an unconditional jump.
  2. JC - This instruction means jump if there is a carry present.
  3. JNC - This instruction means jump if there is no carry present.
  4. JZ - This instruction means jump if zero.
  5. JNZ - This instruction means jump if there is no zero.
  6. JPE - This instruction means jump if even parity.
  7. JPO - This instruction means jump if odd parity.
  8. JP - This instruction means jump if plus value.
  9. JM - This instruction means jump if minus value.

7. Call Instruction:

  1. CALL - This instruction means to call. It is an unconditional call.
  2. CC - This instruction means call if there is a carry present.
  3. CNC - This instruction means call if there is no carry present.
  4. CZ - This instruction means call if zero.
  5. CNZ - This instruction means call if there is no zero.
  6. CP - This instruction means call if plus value.
  7. CM - This instruction means call if minus value.
  8. CPE - This instruction means call if even parity.
  9. CPO - This instruction means call if odd parity.

8. Return Instruction:

  1. RET - This instruction means to return. It is an unconditional return.
  2. RC - This instruction means return if there is a carry present.
  3. RNC - This instruction means return if there is a no carry present.
  4. RZ - This instruction means return if zero.
  5. RNZ - This instruction means return if there is no zero.
  6. RP - This instruction means return if plus value.
  7. RM - This instruction means return if minus value.
  8. RPE - This instruction means return if even parity.
  9. RPO - This instruction means return if odd parity.

Conclusion: We are briefly discussing about the instruction set of 8085. With this instruction, we can quickly write any program in microprocessor 8085.